FPGA Implementation of Spectral Subtraction for In-Car Speech Enhancement and Recognition

The use of speech recognition in noisy environments requires the use of speech enhancement algorithms in order to improve recognition performance. Deploying these enhancement techniques requires significant engineering to ensure algorithms are realisable in electronic hardware. This paper describes the design decisions and process to port the popular spectral subtraction algorithm to a Virtex-4 field-programmable gate array (FPGA) device. Resource analysis shows the final design uses only 13% of the total available FPGA resources. Waveforms and spectrograms presented support the validity of the proposed FPGA design

FPGA implementation of spectral subtraction for automotive speech recognition

The use of speech recognition in noisy automotive environments requires the application of speech enhancement algorithms to improve recognition performance. Deploying these enhancement techniques necessitates significant engineering to ensure algorithms are realisable in electronic hardware. This paper describes advances in porting the popular spectral subtraction algorithm to a Spartan-3A DSP field-programmable gate array (FPGA) device suitable for integration in automotive environments. Resource analysis shows the final design uses only 13% of the total available general logic resources making it suitable for integration with other in-car devices on a single FPGA. Speech recognition experiments have been used to verify the effectiveness of the FPGA implementation for in-car speech recognition in comparison with an equivalent floating-point implementation